1. The basic concept of vias

Through hole (via) is an important part of multi-layer PCB, one of the costs of drilling PCB system board costs usually account for 30% to 40%. Simple to say, PCB on each hole can be called through-hole. From the point of view function, through-hole can be divided into two categories: First, for electrical connection between layers; second is for a fixed or positioning devices. If the process on from the process, these vias generally divided into three categories, namely, blind holes (blind via), buried vias (buried via) and through-hole (through via). Blind hole in the top and bottom surface of printed circuit boards, has a certain depth, for the line and below the inner surface of the connection lines, the depth of the hole is usually no more than a certain ratio (aperture). Buried hole is located in the inner connection hole printed circuit board, it does not extend to the circuit board surface. The two holes are located in the inner layer circuit board, laminated molding process before the use of through-hole completion in the through-hole formation process may also do some inner overlap. The third is called through-hole, this hole through the entire circuit board can be used to achieve interconnection or as a component within the installation of positioning holes. As the hole in the craft easier to achieve low cost, so most of the printed circuit board are using it, rather than the other two holes. What follows through holes, no special instructions are considered as a hole.

From the design point of view, a through-hole mainly consists of two parts, one middle hole (drill hole), the second is the drilling pad around the area, the size of these two determines the size of vias . Obviously, the high-speed, high-density PCB design, designers always want the smaller the better-off hole, so you can leave more of the wiring board space, in addition, smaller vias, the parasitic capacitance of its own The smaller, more suitable for high-speed circuit. However, the decrease of pore size also brings increased costs, but also through holes the size of the decrease could not unlimited, it by drilling (drill) and electroplating (plating) and other technology limitations: the smaller the hole, drill hole processing more difficult, takes longer, the more likely to deviate from the center; and when drilling holes deeper than 6 times the diameter, the hole wall can not guarantee uniform copper plating. For example, now a normal one 6 layer PCB board thickness (hole depth) is about to 50Mil, it is generally PCB manufacturers can provide the smallest diameter can reach 8Mil.

2. Via the parasitic capacitance

Via its existence on the ground parasitic capacitance, if the shop is known through-hole formation in the isolated hole diameter D2, through-hole pad diameter D1, PCB board thickness T, board substrate dielectric constant ε, then through holes the size of the parasitic capacitance is similar:

C = 1.41εTD1 / (D2-D1)

Via the parasitic capacitance circuit will cause the main impact is to extend the signal rise time, reduce the speed of the circuit. For example, for a thickness of 50Mil the PCB board, if you use diameter 10Mil, 20Mil over pad diameter hole, the pad and the ground floor area of the distance of copper 32Mil, then we can approximate the above formula calculated through-hole parasitic capacitance generally: C = 1.41x4.4x0.050x0.020 / (0.032-0.020) = 0.517pF, this part of the capacitance variation due to the rise time is: T10-90 = 2.2C (Z0 / 2) = 2.2 x0.517x (55 / 2) = 31.28ps. As can be seen from these values, although a single through-hole caused by the parasitic capacitance of the effectiveness of increased extension of slowing down is not very obvious, but if you take the line through holes in multiple layers of switches, designers still have to carefully consider.

3. Via the parasitic inductance

Similarly, the parasitic capacitance of vias, while there also exist parasitic inductance in the high-speed digital circuit design, the parasitic inductance vias harm is often greater than the parasitic capacitance. It will weaken the parasitic series inductance bypass capacitor contribution to weaken the effectiveness of the entire power system filter. We can use the following formula to calculate a simple approximation of the parasitic inductance vias:

L = 5.08h [ln (4h / d) +1]

Which means the through-hole inductance L, h is the length of the through-hole, d is the diameter of center hole. From the style can be seen through the hole diameter has little effect on the inductance, while the greatest impact on the inductor is the length of vias. Still use the example above, can be calculated through the hole inductance: L = 5.08x0.050 [ln (4x0.050/0.010) +1] = 1.015nH. If the signals rise time is 1ns, then the equivalent impedance of size: XL = πL/T10-90 = 3.19Ω. This impedance in a high-frequency current through has not been ignored, with particular attention to, bypass capacitor connected when the power level and the formation needs through two through holes, so the parasitic inductance of vias will be multiplied.

4. The through-hole high-speed PCB design

Faced by the parasitic characteristics of holes, we can see that in the high-speed PCB design, often deceptively simple through hole design of the circuit will bring a negative effect. To reduce the parasitic vias adverse effects can be as far as possible in the design:

1. From a cost and signal quality on both sides, choose a reasonable size hole the size of the over. Such as memory modules on the 6-10 layer PCB design, the use 10/20Mil (drill / pad) over holes better, for some small-size high-density board, you can also try using 8/18Mil over hole. Under current technology, it is difficult to use a smaller size than hole up. For the power or ground vias can consider using a larger size to reduce impedance.

2. The two discussed above formula can be drawn, the PCB board using thin help reduce the parasitic parameters of the two vias.

3. PCB board signal traces as far as possible without changing the layer that is as far as possible not to use unnecessary vias.

4. Power and ground pins to the nearest played holes, vias and pins as short as possible between the leads, because they will lead to increased inductance. While power and ground leads as possible crude to reduce the resistance.

5. Change in the signal layer through holes placed near the ground over a number of holes in order to provide the latest signal circuit. PCB board can even put some of the extra large number of ground vias.

Of course, also to have flexibility in the design. Via model discussed earlier is the situation on each floor pads are also sometimes, we can reduce or even some level pad removed. Particularly in cell density over a very large cases, may lead to copper layer in the shop a cut off loop of broken Xingcheng slot to resolve this problem, aside from moving the location of vias, we can also consider the through-hole copper layer in the shop the pad size decreases